Skybox Onboarding

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System Description [1]

The Skybox is a product that powers 64 tubes. It consists of two subproducts: Juicebox and Brainbox. The Juicebox is responsible for providing power, communicating lighting data to the Brainbox via DMX, and all user interfacing. The Brainbox takes power and DMX from the Juicebox, applies gamma curves and fades and outputs PWM for lighting.

The Skybox's code base has a large overlap with that of the LimeLite, particularly when it comes to interface, models and backends. One key difference, however, is that the final endpoint of the Juicebox is DMX output to the brainbox, as opposed to direct control over LEDs. The lighting controls are multiplexed within the Juicebox as seen in Figure 1 from the Juicebox repository [2].

The Juicebox sends a DMX frame to the Brainbox containing ICCT 16-bit data for lighting and uses the subsequent slots to send data such as gamma and fade among other stuff with a CRC appended at the end (temporarily ignored as of April 2nd 2025 to make testing the brainbox on its own easier).

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The Brainbox is the device responsible for controlling the lights via PWM based on incoming DMX from the Juicebox. After converting ICCT to direct tungsten + daylight and applying gamma curves and fades, it continuously refreshes an FPGA's channel registers [3] with tungsten and daylight values via I2C. The FPGA then handles the PWM based on the values it gets.

Power System

The Skybox is powered by mains single-phase 240VAC which is broken out into 3 CAM Locks that connect to the Juicebox as seen in figure x.

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This powers the Juicebox PCB and two MeanWell PHP-3500-48 DC Power Supplies in parallel. The connections for the 6 pin CN47 connector or the 22 pin CN55 connector to enable or disable features are currently unknown other than the output being enabled [6].

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The Juicebox supplies 48VDC through 50 meters of 2AWG cable along with data through 18AWG. This is received by the Brainbox powering 4 output boards, and a mainboard.

The Brainbox Output is designed for up to 24 amps per board to power 16 tubes each through a common anode.

The mainboard steps down 48VDC to 12VDC through a DC-DC regulator. The 12VDC is then further stepped down to 3.3VDC for an ESP32-PICO-D4 and 5VDC for the iCE40HX8K FPGA. The FPGA outputs 8 signals (3.3V-5V but not sure) to control the switching for the mosfets, a +3.3V POWER_ON flag to enable the boards through an optocoupler and a +12V line to control the low-side mosfet driver which then switches the mosfet.

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Skybox Tube Panel

The Skybox Tube Panel is composed of 64 Bi-Color tubes with the specifications seen in table x with 4 tubes sharing power, and two separate cathodes, one for Tungsten and one for Daylight as seen in figure x. Each tube has 27 LED strips connected in parallel, with each strip containing diodes and resistors in series for their respective color.

Table x. Skybox Tube Specifications [4-5]

2BI Tube - 9ft		Value	Unit
Bar Length		2718	mm
Tube Length		2730	mm
Heatshrink Length (Before Shrinking)		25	mm
Tape Parameters
Section Length		100	mm
Tape Width		12	mm
Number of Sections in Tube		27
Tape Total Length		2.7	m
Tape Offset From End of Solder Side of Bar		15	mm
Tape Offset From End of Bar		3	mm
Electrical Specifications
Tape		SCS-2BI-280-48
LEDS/Meter		280	/m
Voltage		48	V
Power/Meter		50	W/m
Estimated Performance
Tube Power		135	W
(Tungsten/Daylight) Tube Current	100/100 1 Tube	2.81	A
	100/100 4 Tube	11.25	A
	100/100 16 Tube	45	A
(Tungsten/Daylight) Single Channel Current	100/0 1 Tube	1.41	A
	100/0 4 Tube	5.63	A
	100/0 16 Tube	22.5	A

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These tubes are bundled in groups of 4 with the Tungsten and Daylight channels having their own common cathodes that connect to ground through a mosfet on the Brainbox Output Board. This setup results in each board powering and controlling 16 tubes using 8 mosfets, with 2 mosfets assigned to control the Tungsten and Daylight channels of 4 tubes as seen in figure x.

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Juicebox (JB)

• The Juicebox consists of 2 Mean Well power supplies as well as one of our PCBs tying them in together, controlling them, handling the UI and DMX, etc

Juicebox Review

The Juicebox mainboard has a couple changes that need to be done:

• … (There was nothing listed here for changes)
• The whole system needs to go into a shutdown if DMX / RDM between the JB and the BB gets disconnected. This is not yet implemented. (Mar 28 2025, Shane says: I think this is a description of a workaround. IIRC, sometimes the Juicebox is unable to transmit DMX, and the current way to resolve it is to unplug it from power for long enough that the power supplies drain their capacitors and everything fully shuts down. The reason for the failure is unknown and needs to be resolved. An optimal resolution should not require a restart of either device.)

Brainbox (BB)

• Receives power and DMX from the Juicebox which then controls all of the high current outputs (about 24A per output board)
• The Brainbox Mainboard gets power and DMX, goes to an ESP32 that then talks to:
  • An FPGA devboard. The FPGA acts as an I2C peripheral, with 2x 16-bit registers that control the output PWM, which then feeds the PWM into:
  • 4x Brainbox output boards. These are then connected to the output Amphenol connectors that feed into the panel.

"The idea is to treat this like a module, where channel data is sent in (I2C or SPI), and it outputs X number of PWM channels, to be fed into gate drivers/MOSFETs"

• The Lattice ICE40 has an OSS toolchain, an internal PLL, and is fairly low cost
• With the PLL, and per-cycle control that FPGAs provide, this system can do higher resolution at 30kHz than most other digital strategies
• It currently takes in I2C, and some of the registers map to output PWM channels. Other registers for configuration set the PWM period and such.
• I2C might not be a good strategy going forward - DMX allows for 44 complete frame changes per second, and I2C might not be able to keep up with that, if we want to

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use significantly more output channels (like for a fully controllable Skybox). SPI as an option would be good. It is possible to have this module use either, depending on use-case.

Brainbox Review

The Brainbox has a lot of changes to be made:

• The power supplies had high ripple current and need to be redesigned - Currently subbed in with some Chinese SMPS modules
• The schematic has a bad connection on the DMX area. In the main sheet, the wires connecting P1-Micro->P2-DMX are mixed up, and need to be fixed
  • Make sure the new assignments work as GPIO outputs on the ESP32, if needed
• Eventually the FPGA should be built on-board
• It would be cool to get some sort of signal information back from the output board - Thermal, current sensors, etc

Future Plans

FPGA

• The FPGA is currently set up for 2 channels, which is then split out into 32 output pins each (actually 3 outputs, but the last goes out to 4 pins, as the "enable" pin
• The Verilog must be modified to support more registers, and distribute those appropriately among the output pins
• Other strategies going forward:
  • The TI C2000 series has a HRPWM (with micro edge positioner technology) that is worth checking out - It might be able to do 16-bit control at 30kHz, but might have limited channel count. Needs more investigation
  • An FPGA with a faster PLL will be able to squeeze out more resolution

Calibration

• Calibration with only tungsten and daylight LEDs is simple:
  • Each grouping of 4 tubes must be turned on until they are just barely on
  • At every level (within reason - skip some values to make it faster and interpolate the data later), use the Sekonic to grab lux output
  • In the brainbox ESP32 software, map "target" lux(which is purely linear) to "actual" DMX values that hit that lux value

Creating an RGBA Version

• RGBA or any other colour space is similar:

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• Add more output registers on the FPGA
• Attach those registers to the desired output pins, which go to the desired Amphenol connector
• Update the ESP32 (and the Juicebox ESP32) to support new colourspaces

Compiled Changes

• Evaluate new SMPS ICs for the Brainbox. Using the SCT2650 as a low-cost and higher input tolerance replacement for the MCP16331 resulted in a very large Vp-p, so it requires more testing (and likely a larger inductor). Using the TI Webench and genuine TI parts to hit the requirements is possibly a better pathway, as they've been rock-solid and work on the first board revision. The other pathway is to test out the SCT2650 and fix the design issues with it.
• Use the new SMPS in the Skybox's Brainbox design. The Juicebox might supply up to 54V to the Brainbox, which needs to be able to handle that. It currently has some soldered on no-name SMPS modules from China to make the prototype work.
• Integrate the FPGA into the Skybox's Brainbox design. The prototype currently uses an external FPGA devboard mounted onto it, because it was faster to meet the prototype deadline.
• Minor modifications on the Juicebox PCB
• Get 5 of the hardware designs manufactured for the Skybox. 5x Juice Box mainboard, 5x Brain Box mainboard, 20x output driver boards, cables

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Current Status and Testing

Key Components

Driver Board Capacitors: PCV2B120MCL1GS, Part C1 in KiCad brainbox-outputs

Main Board Capacitor: T55C475M063C0200, Part C20 in KiCad brainbox-mainboard

Tube Driven Mosfets: Vishay SiR182DP, Parts Q2-Q9 in KiCad brainbox-outputs

Alternative Driver Board Capacitor: GYA1K470MCW1GS for Part C1 in KiCad brainbox-outputs

Brainbox

Ongoing research into the current status of the Brainbox has established some dire issues with the system that must be resolved to both further development and get it rental worthy. The main problem seen with the Brainbox's operation are its thermal issues, as the driver capacitors, motherboard capacitor, and driver mosfets reach up to 90-100℃ under peak load (50% duty cycle). These thermal issues compounded with a large peak-to-peak voltage ripple at power (Vin) are hypothesized to be a symptom of the greater issue of an excessive ripple current.

High Ripple Current

The Brainbox is performing at reduced capabilities with components needing to be re-specified for current power requirements. The aluminum-polymer driver capacitors [8] cannot withstand the instantaneous current draw of the tubes before the power supplies catch up. This results in the capacitors depleting quickly and heating up because of the current ripple at the closing of the mosfet, making these capacitors the hottest component on the output board which is an indication of improper use [12].

Initial testing was done using one PHP-3500-48 power supply [6] and one driver board that powered four tubes as seen in figure x.

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The load as seen in table 1 was measured across the terminal blocks that supply power to both the output and main board but is labeled on the power supply terminals (P1) for simplicity. This assumes that the power required for the Brainbox boards is negligible compared to the draw of the tubes.

Table 1. Brainbox Output Board 4-Tube Testing with (1x PHP-3500-48 Short Cable)

Color	Output (0-255)	Output (%)	Voltage (V)	Current (A)	Power (W)	Brainbox Power Usage against Tape Power Rating (%)
Tungsten	51	20	48.36	1.32	63.8	118.15
	102	40	-	-	-	-
	127	50	48.27	2.85	137.5	102.25
	204	80	48.11	4.44	213.6	98.89
	255	100	48.1	5.22	250.3	92.70
Daylight	51	20	48.36	1.31	63.3	117.22
	102	40	48.3	2.32	112	103.70
	127	50	48.27	2.83	136.6	101.58
	204	80	48.11	4.41	212.6	98.43
	255	100	48.05	5.21	250.2	92.67
Theoretical both 100%	255	100	48	10.43	500.5	92.69

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With these results an estimate of the performance of the entire board is seen in table 2 again assuming that the power for the Brainbox components is negligible.

Table 2. Theoretical Full Usage of an Output Board (16 Tubes)

Color	Output (0-255)	Output (%)	Voltage (V)	Current (A)	Power (W)	Brainbox Power Usage against Tape Power Rating (%)
Tungsten	51	20	48.36	5.28	255.2	118.15
	102	40	-	-	-	-
	127	50	48.27	11.4	550	102.25
	204	80	48.11	17.76	854.4	98.89
	255	100	48.1	20.88	1001.2	92.70
Daylight	51	20	48.36	5.24	253.2	117.22
	102	40	48.3	9.28	448	103.70
	127	50	48.27	11.32	546.4	101.58
	204	80	48.11	17.64	850.4	98.43
	255	100	48.05	20.84	1000.8	92.67
Theoretical both 100%	255	100	48	41.72	2002	92.69

Another test was performed to measure the thermal characteristics alongside the voltage ripple of the system with the results shown in table 3.

Table 3. Brainbox Driver Board Four-Tube Testing

Tung.Output (0-100%)	Day. Output (0-100%)	Tungsten (Q2) Mosfet Temp. (℃)	Daylight (Q7) Mosfet Temp. (℃)	Capacitor (C1) Temp. (℃)	(P1) Peak-to-Peak Voltage Ripple (V)
100	0	21	16	16	0.2
90	10	63	46	28	2
80	20	62.5	47	34	3.92
70	30	66	52	36	3.68
60	40	75	61	38	3.44
50	50	78	88	39	4.48
40	60	67	79	38	3.52
30	70	57.5	69	37.5	3.76
20	80	55	65	37	3.76
10	90	56.5	70	32	3.04
0	100	30	30	27	0.3

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As seen in Table #3, the peak ripple voltage at peak loading (50% duty cycle) reached 4.48V with mosfet temps reaching near 90℃. The tube driven mosfets [10] are rated for a junction temperature of 150℃, so this temperature is not near part degradation, but is not a good indicator for the overall performance of the brain box when four driver boards will be powered. These mosfets may need thermal management and heatsinking to reduce their package temperatures at higher demand.

After testing on individual boards, the Brainbox was assembled with its four driver boards, full tube load, and powered by the Juicebox. Three probes were used with the oscilloscope to measure the voltage waveforms at the driver board outputs A, D, and H, which is VIN, daylight mosfet Q3, and the tungsten mosfet Q4 respectively. As reference for table # below, the colour temperature 2800K is Tungsten and 6500K is Daylight.

Table 4. Brainbox Full Load Testing (measured at board 4)

Bi-colour Temperature (K)	Intensity (0-100%)	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)	Driver Board Capacitor (C1) Temp. (℃)	Approximate Mosfet Temp. (℃)
2800	10	5.56	5.60	46.5	N/A
2800	15	9.6?	10.4?	57.5	N/A
2800	20	11.4?	11.6?	61	N/A
2800	25	12	12.2	65.7	N/A
2800	30	13	13	70.2	N/A
4940	10	5.73	6.40	55.4	72.7
4940	15	10.1	10.4	81.7	88.7
6500	5	3.06	3.80	29	41
6500	10	3.83	6	47.7	58.2
6500	15	4.57	8.20	54.7	58.2
6500	20	6.04	10.2	62.3	60.7
6500	25	11.6	12.8	67.4	N/A
6500	30	12.5	12.8	70.6	N/A
6500	35	13.5	13.8	74.6	N/A
6500	40	14.1	14.4	78.4	N/A

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Due to the large ripple voltage, and increasing capacitor and mosfet temperatures, the intensity/duty cycle was not tested beyond the values listed in the table above. Pure daylight draws less current, allowing for a higher intensity to be tested, compared to tungsten which was tested to a slightly less intensity. 4940K is the colour temperature that leads to the highest voltage ripple at 10% and 15% intensity by turning on and off both Tungsten and Daylight channels at the same time, with the driver board capacitor [8] temperature reaching 81.7℃. The driver board capacitor [8] has a max operating temperature of 105℃, so these results are getting close to the operational safe limit, and we have only reached 15% duty cycle with the channels switching simultaneously. At this worst case (50% duty cycle) the tantalum capacitor [9] on the Brainbox Mainboard also reached 100℃.

Increasing Capacitance

After both the single board and full Brainbox experiments, a 2200uF was placed across the Brainbox's input power block to attempt to spread the ripple current across multiple capacitors. The voltage ripple did reduce, but only by less than 1V, and component temperatures were a few degrees cooler than previously tested. Adding this large capacitor on the input side of the Brainbox did improve the ripple and component temperatures, but the marginal reduction indicates that we need to find the optimal capacitor values, the number of capacitors, and capacitor placement. The next steps for expanding this solution to cover the demands of 4 boards is to ensure that the power supplies are capable of driving that capacitance, then designing and building a capacitor bank to supply the on-demand power that the Juicebox can't supply.

As another test to try to reduce the ripple, an alternative capacitor [11] was substituted in place of the driver board capacitor [8]. The alternative capacitor is rated 47uF 80VDC 1.3A ripple current, compared to the 12uF 125VDC 1.4A ripple current driver capacitor. The tests were conducted on one driver board, see Figure 11, with a load of four tubes and then 16 tubes. Both tests were conducted only at 2800K colour temperature.

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Table 5. Brainbox Driver VS Alternative Capacitor (four tube load)

Intensity (0-100%)	Old Driver Capacitor		New Alternative Capacitor
	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)
10	2.59	2.68	2.08	2.12
25	3.20	3.60	2.08	2.20
50	4.73	4.80	2.12	2.28
75	4.10	4.24	2.12	2.28

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Table 6. Brainbox Driver VS Alternative Capacitor (sixteen tube load)

Intensity (0-100%)	Old Driver Capacitor		New Alternative Capacitor
	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)
10	3.46	3.84	1.58	1.64
25	8	8	2.84	2.96
50	*N/A	*N/A	4.22	4.24
75	*N/A	*N/A	3.37	3.52

*Results were unavailable for the old driver capacitor above 25% intensity, as the motherboard capacitor exceeded 75℃ and the old driver capacitor became the hottest part on the driver board at 50℃.

From the data in the Tables 5 and 6 above, the new alternative 47uF capacitor did reduce the ripple voltage by a significant amount, up to 2.62V in the four tube test and up to 5.16V in the sixteen tube test. It is important to note that similar results were found for daylight 6500K colour temperature, but any combination of tungsten and daylight in the range of 2900-6400K resulted in excessive heating in the mosfets and mainly the driver capacitor and motherboard capacitor. This alternative capacitor has reduced the voltage ripple on just tungsten or daylight, but still does not reduce the ripple voltage at tungsten daylight combinations.

Because this alternative capacitor reduced the ripple voltage but still was the hottest component on the board, two of these capacitors were fashioned in parallel and attached to the board using short leads, as seen in Figure 12, and results recorded in table 7.

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Table 7. Brainbox Driver VS Alternative VS Parallel Alternative (sixteen tube load)

Intensity (0-100%)	Old Driver Capacitor		New Alternative Capacitor		Parallel Alternative Capacitor
	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)	Average Peak-to-Peak Voltage Ripple VIN (V)	Max Peak-to-Peak Voltage Ripple VIN (V)
10	3.46	3.84	1.58	1.64	1.39	1.40
25	8	8	2.84	2.96	1.72	1.76
50	*N/A	*N/A	4.22	4.24	2.42	2.44
75	*N/A	*N/A	3.37	3.52	2.02	2.08

*Results were unavailable for the old driver capacitor above 25% intensity, as the motherboard capacitor exceeded 75℃ and the old driver capacitor became the hottest part on the driver board at 50℃.

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By fashioning these two capacitors in parallel, there is double the capacitance and the ripple current rating, and half the ESR. This small capacitor bank reduced the ripple voltage nearly in half, and the capacitor did not reach as high of temperatures as the previous tests with one capacitor. The colour temperature was able to be put at 4650K, which is 50% tungsten and 50% daylight, and at 50% duty cycle. It is promising that this was able to withstand the heaviest load, but component heating was still an issue, as the driver board got up near 90℃. As previously advised, a capacitor bank would be a good start to reducing the ripple and component heat, and this experiment is a step in that direction. A better calculated capacitance would likely produce a greater reduction in ripple voltage and less component heat, as these were just tests with capacitors that we had on-hand. Redesigning the board so both the capacitors are surface mounted would also likely reduce noise and potentially the ripple as well.

Thermal Management

One of the main thermal issues is that the driver capacitor becomes the hottest component on the driver board and the main board capacitor exceeds that temperature at higher intensities and voltage swings. These issues are hypothesized to be resolved when the

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voltage ripple is under control, as seen by the parallel capacitor test seen in the High Ripple Current section above.

With the lowered capabilities of the Brainbox, another design consideration is if the mosfet package [10] is sufficient for dissipating the heat generated when switching at 25kHz as the duty cycle increases. With the driving capacitor limiting the achievable output, this issue has been sidelined but needs to be dealt with for any re-design of the board. Additional heatsinking also would need to be addressed to reduce the mosfet operating temperatures when analyzing the mosfet package. The temperatures reached by the mosfet would also be reduced when addressing the voltage ripple, but the mosfet temperatures with the four driver boards at a higher intensity is unknown.

These issues are likely a sign of power from the Juicebox having a slow response time to ramp the output current to meet the demand of the output board. This also can be caused by the 50 feet of 2 AWG cable that is untwisted and laying in a coil creating an inductive load to the Brainbox further impeding this response. Future testing would be to reconnect the Brainbox to the Juicebox over a short distance and observe the response time of the Juicebox.

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Future Development

Skybox Calibration

The next steps after the thermal and discharge issues are resolved is to calibrate the Brainbox controls to create a uniform visual appearance across all of the tubes in the Skybox. Currently each brainbox output board has a unique set of tubes that will appear dimmer or brighter than the majority from that board.

Raising the minimum output

With the current design of the Brainbox mainboard providing 2x16bit channels to the 4 output boards, this would be possible by raising the minimum permitted duty cycle guaranteeing that the tubes will turn on and at an intensity that looks uniform.

Expanding the system for individual mosfet tuning

The other option is increasing the capacity of the FPGA and modifying the mainboard to provide 4x16bit channels to control each driver board individually. This would result in the individual mosfets being adjustable to reach a lower end intensity than the former option but would need to be calibrated to the specific board. Therefore creating a large amount of overhead for an output board replacement requires that section to be calibrated and the

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Brainbox mainboard firmware be reflashed each time. This would require a lot of restructuring of the code to accommodate 4 different output board profiles, ensuring they are available to be reflashed when required or that we are capable of only flashing to a dedicated partition for that output board.

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References

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Appendix